As the miniaturization of a wafer procedes and the width of a pattern to be formed on the wafer is narrowed in an ion implantation shadowing becomes a problem. For a CMOS (complementary metal oxides semiconductor) DRAM (Dynamic Random Access Memory) having 4M bits or more, thus, it is necessary to ion implant the whole surface of a wafer in a predetermined direction with an allowable range of 0.5.degree.. More specifically, as the wafer is increased in its diameter to 6 or 8 inches and its capacity to 4M or 16M bits, and thus the width of the pattern is reduced, it is desired that the ion implantation is performed by using a parallel ion beam. With a conventional raster scan type ion implanter having a deflector for scanning an ion beam, however, even if a distance between the deflector and the wafer to be ion implanted is 160cm, the maximum deflecting angle for a 6-inch wafer becomes .alpha..sub.max =2.7.degree..
In a conventional electrostatic X-Y sleeping type deflector system, an ion beam has a deflecting angle ( or sweeping angle ) except the center portion because the ion beam is raster-scanned in X and Y directions ( or repeatedly deflected ). Thus, when such ion beam is implanted to a flat wafer, it is to be implanted at an oblique angle to the wafer except the center portion thereof. This phenomenon causes a shadowing in the ion implantation to a semiconductor wafer to reduce its yield. Further, the uniformity of the ion implantation is deteriorated at the periphery portion of the wafer where the ion implanting angle becomes large on the surface of the wafer to which the ion beam is implanted in the oblique angle ion beam implantation, thus feasibly causing a channeling.
Then, there has been proposed a parallel sweeping system for implanting ions to a wafer in a predetermined direction by using two electrostatic deflectors, in which the ion beam is deflected at .alpha..degree. by the first electrostatic deflector, run at a distance L and then deflected at -.alpha..degree. by the second electrostatic deflector. FIGS. 1 and 2 show some examples of the conventional systems proposed heretofore for the parallel sweeping.
In FIG. 1, reference character A designates a first parallel flat plate deflector which comprises Y-axis sweeping electrode set A1 and X-axis sweeping electrode set A2, and reference character B designates a second parallel flat plate deflector which comprises Y-axis sleeping electrode set B1 and X-axis sleeping electrode set B2. An ion beam is swept in a Y-axis direction by applying a periodically varying electric field of triangular or sawtooth waves between the electrodes of the Y-axis sweeping electrode set A1 and then is swept in a X-axis direction by applying a periodically varying electric field of triangular or sawtooth waves between the electrodes of the X-axis sweeping electrode set A2 in the first parallel flat plate deflector A. In the second parallel flat plate detector B, the ion beam is similarly swept in the Y-axis and X-axis directions to implant the ions to the wafer in a predetermined direction.
The system illustrated in FIG. 2 comprises a first parallel flat plate quadruple pole deflector C and a second parallel flat plate quadruple pole deflector D.
In the above-mentioned conventional systems, each deflector has effective range narrower due to a disorder in the electric field at the edge portion. It is, therefore, necessary to increase the width of the scanning and thus the size of the electrodes. The deflector also has a deflecting distortion considerably increased. In the deflector of the rear stage, there arise drawbacks that it has an increased electric capacity, the triangular wave voltage becomes obtuse in case of high speed scanning, and it becomes difficult to design a scanning power source. The parallel scanning with the electrostatic deflection system may be achieved merely up to 2-inch wafer at present due to the drawbacks described above.
Therefore, an object of the present invention is to provide a parallel sweeping system for an electrostatic sweeping ion implantor which can eliminate the above-mentioned drawbacks and which can always implant an ion beam in a predetermined direction even to a 6 -inch or larger wafer.